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IDT74LVC377A 3.3V CMOS OCTAL 8-BIT REGISTER WITH CLOCK ENABLE INDUSTRIAL TEMPERATURE RANGE 3.3V CMOS 8-BIT REGISTER WITH CLOCK ENABLE AND 5 VOLT TOLERANT I/O FEATURES: DESCRIPTION: IDT74LVC377A * 0.5 MICRON CMOS Technology * ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0) * VCC = 3.3V 0.3V, Normal Range * VCC = 2.7V to 3.6V, Extended Range * CMOS power levels (0.4 W typ. static) * Rail-to-rail output swing for increased noise margin * All inputs, outputs, and I/O are 5V tolerant * Supports hot insertion * Available in SOIC, SSOP, QSOP, and TSSOP packages This 8-bit register with clock enable is built using advanced dual metal CMOS technology. This high-speed, low power device is an 8-bit register with a buffered common clock, buffered output drive, and synchronous clock enable, that is ideal for driving high capacitance loads such as memory address and data buses. All pins can be driven from either 3.3V or 5V devices. This feature allows the use of these devices as translators in a mixed 3.3V/5V supply system. DRIVE FEATURES: * High Output Drivers: 24mA * Reduced system switching noise APPLICATIONS: * 5V and 3.3V mixed voltage systems * Data communication and telecommunication systems FUNCTIONAL BLOCK DIAGRAM CE D Dx CP C Q Ox The IDT logo is a registered trademark of Integrated Device Technology, Inc. INDUSTRIAL TEMPERATURE RANGE 1 (c) 1999 Integrated Device Technology, Inc. OCTOBER 1999 DSC-4589/1 IDT74LVC377A 3.3V CMOS OCTAL 8-BIT REGISTER WITH CLOCK ENABLE INDUSTRIAL TEMPERATURE RANGE PIN CONFIGURATION ABSOLUTE MAXIMUM RATINGS(1) Symbol Description Max VTERM TSTG IOUT IIK IOK ICC ISS Terminal Voltage with Respect to GND Storage Temperature DC Output Current Continuous Clamp Current, VI < 0 or VO < 0 Continuous Current through each VCC or GND -0.5 to +6.5 -65 to +150 -50 to +50 -50 100 Unit V C mA mA mA CE O0 D0 D1 O1 O2 D2 D3 O3 GND 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 VCC O7 D7 D6 O6 O5 D5 D4 O4 CP NOTE: 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. CAPACITANCE (TA = +25C, F = 1.0MHz) Symbol CIN COUT CI/O Parameter(1) Input Capacitance Output Capacitance I/O Port Capacitance Conditions VIN = 0V VOUT = 0V VIN = 0V Typ. 4.5 5.5 6.5 Max. 6 8 8 Unit pF pF pF SOIC/ SSOP/ QSOP/ TSSOP TOP VIEW NOTE: 1. As applicable to the device type. PIN DESCRIPTION Pin Names CE CP Ox Dx Clock Input Data Outputs Data Inputs Description Clock Enable Input (Active LOW) FUNCTION TABLE (1) Inputs CE H L L CP Dx X L H Internal Q Value NC L H Outputs Ox NC L H Function Hold Value Load Input Data NOTE: 1. H = HIGH Voltage Level L = LOW Voltage Level X = Don't Care = LOW-to-HIGH Transition 2 IDT74LVC377A 3.3V CMOS OCTAL 8-BIT REGISTER WITH CLOCK ENABLE INDUSTRIAL TEMPERATURE RANGE DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE Following Conditions Apply Unless Otherwise Specified: Operating Condition: TA = -40C to +85C Symbol VIH VIL IIH IIL IOZH IOZL IOFF VIK VH ICCL ICCH ICCZ ICC High Impedance Output Current (3-State Output pins) Input/Output Power Off Leakage Clamp Diode Voltage Input Hysteresis Quiescent Power Supply Current VCC = 0V, VIN or VO 5.5V VCC = 2.3V, IIN = -18mA VCC = 3.3V VCC = 3.6V VIN = GND or VCC -- -- -- -- -- -- -- -0.7 100 -- -- -- 50 -1.2 -- 10 10 500 A V mV A VCC = 3.6V VO = 0 to 5.5V -- -- 10 A Parameter Input HIGH Voltage Level Input LOW Voltage Level Input Leakage Current VCC = 2.3V to 2.7V VCC = 2.7V to 3.6V VCC = 2.3V to 2.7V VCC = 2.7V to 3.6V VCC = 3.6V VI = 0 to 5.5V Test Conditions Min. 1.7 2 -- -- -- Typ.(1) -- -- -- -- -- Max. -- -- 0.7 0.8 5 A V Unit V Quiescent Power Supply Current Variation 3.6 VIN 5.5V(2) One input at VCC - 0.6V, other inputs at VCC or GND A NOTES: 1. Typical values are at VCC = 3.3V, +25C ambient. 2. This applies in the disabled state only. OUTPUT DRIVE CHARACTERISTICS Symbol VOH Parameter Output HIGH Voltage VCC = 2.3V VCC = 2.3V VCC = 2.7V VCC = 3V VCC = 3V VOL Output LOW Voltage VCC = 2.3V to 3.6V VCC = 2.3V VCC = 2.7V VCC = 3V IOH = - 24mA IOL = 0.1mA IOL = 6mA IOL = 12mA IOL = 12mA IOL = 24mA Test Conditions(1) VCC = 2.3V to 3.6V IOH = - 0.1mA IOH = - 6mA IOH = - 12mA Min. VCC - 0.2 2 1.7 2.2 2.4 2.2 -- -- -- -- -- Max. -- -- -- -- -- -- 0.2 0.4 0.7 0.4 0.55 V Unit V NOTE: 1. VIH and VIL must be within the min. or max. range shown in the DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE table for the appropriate VCC range. TA = - 40C to + 85C. 3 IDT74LVC377A 3.3V CMOS OCTAL 8-BIT REGISTER WITH CLOCK ENABLE INDUSTRIAL TEMPERATURE RANGE OPERATING CHARACTERISTICS, VCC = 3.3V 0.3V, TA = 25C Symbol CPD CPD Parameter Power Dissipation Capacitance per Transceiver Outputs enabled Power Dissipation Capacitance per Transceiver Outputs disabled Test Conditions CL = 0pF, f = 10Mhz Typical Unit pF SWITCHING CHARACTERISTICS(1) VCC = 2.7V Symbol tPLH tPHL tSU tH tSU tH tW tSK(o) Parameter Propagation Delay CP to Ox Data Setup Time, Dx to CP Data Hold Time, Dx to CP Clock Enable Data Setup Time, CE to CP Clock Enable Data Hold Time, CE to CP CLK Pulse Width, HIGH or LOW Output Skew(2) 2.5 1.5 3 1.5 3.3 Min. 1.5 Max. 9.5 VCC = 3.3V 0.3V Min. 1 2.5 1.5 3 1.5 3.3 Max. 8.5 Unit ns ns ns ns ns ns ps -- -- -- -- -- -- -- -- -- -- -- -- 500 -- NOTES: 1. See TEST CIRCUITS AND WAVEFORMS. TA = - 40C to + 85C. 2. Skew between any two outputs of the same package and switching in the same direction. 4 IDT74LVC377A 3.3V CMOS OCTAL 8-BIT REGISTER WITH CLOCK ENABLE INDUSTRIAL TEMPERATURE RANGE TEST CIRCUITS AND WAVEFORMS TEST CONDITIONS Symbol VLOAD VIH VT VLZ VHZ CL VCC(1)= 3.3V0.3V VCC(1)= 2.7V 6 2.7 1.5 300 300 50 6 2.7 1.5 300 300 50 VCC(2)= 2.5V0.2V 2 x Vcc Vcc Vcc / 2 150 150 30 Unit V V V mV mV pF SAME PHASE INPUT TRANSITION tPLH OUTPUT tPLH OPPOSITE PHASE INPUT TRANSITION tPHL tPHL VIH VT 0V VOH VT VOL VIH VT 0V LVC Link VCC 500 Pulse (1, 2) Generator VIN D.U.T. RT 500 CL VOUT VLOAD Open GND CONTROL INPUT Propagation Delay ENABLE DISABLE VIH VT 0V VLOAD/2 VOL+VLZ VOL VOH VOH-VHZ 0V LVC Link tPZL OUTPUT SWITCH NORMALLY VLOAD LOW tPZH OUTPUT SWITCH NORMALLY GND HIGH VLOAD/2 VT tPHZ VT 0V tPLZ LVC Link Test Circuit for All Outputs DEFINITIONS: CL = Load capacitance: includes jig and probe capacitance. RT = Termination resistance: should be equal to ZOUT of the Pulse Generator. NOTES: 1. Pulse Generator for All Pulses: Rate 10MHz; tF 2.5ns; tR 2.5ns. 2. Pulse Generator for All Pulses: Rate 10MHz; tF 2ns; tR 2ns. NOTE: 1. Diagram shown for input Control Enable-LOW and input Control Disable-HIGH. Enable and Disable Times SWITCH POSITION Test Open Drain Disable Low Enable Low Disable High Enable High All Other Tests Switch VLOAD GND Open DATA INPUT TIMING INPUT ASYNCHRONOUS CONTROL SYNCHRONOUS CONTROL VIH VT 0V VOH VT VOL VOH VT VOL tSU tH tREM tSU tH VIH VT 0V VIH VT 0V VIH VT 0V VIH VT 0V LVC Link INPUT Set-up, Hold, and Release Times tPLH1 tPHL1 OUTPUT 1 tSK (x) tSK (x) LOW-HIGH-LOW PULSE tW HIGH-LOW-HIGH PULSE VT OUTPUT 2 tPLH2 tPHL2 VT Pulse Width LVC Link LVC Link tSK(x) = tPLH2 - tPLH1 or tPHL2 - tPHL1 Output Skew - tSK(X) NOTES: 1. For tSK(o) OUTPUT1 and OUTPUT2 are any two outputs. 2. For tSK(b) OUTPUT1 and OUTPUT2 are in the same bank. 5 IDT74LVC377A 3.3V CMOS OCTAL 8-BIT REGISTER WITH CLOCK ENABLE INDUSTRIAL TEMPERATURE RANGE ORDERING INFORMATION LVC X IDT XX Bus-Hold Temp. Range XX XXXX Device Type Package SO PY Q PG 377A Small Outline IC (gull wing) Shrink Small Outline Package Quarter Size Small Outline Package Thin Shrink Small Outline Package 8-bit Register with Clock Enable, 24mA Blank 74 No Bus-hold -40C to +85C CORPORATE HEADQUARTERS 2975 Stender Way Santa Clara, CA 95054 for SALES: 800-345-7015 or 408-727-6116 fax: 408-492-8674 www.idt.com for Tech Support: logichelp@idt.com (408) 654-6459 6 |
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